PCIe (1.0a to 2.0) Virtual Root Complex model, in C, co-simulating with Verilog, SystemVerilog and VHDL, with Endpoint capabilities

IP Core Library - Published and maintained by the Open Source VHDL Group

USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL

ONVIF multi device client NVC (Network Video Client) and PVR (Personal Video Recorder)

10GbE XGMII TCP/IPv4 packet generator in C, co-simulating with Verilog, SystemVerilog and VHDL

High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model

🛸 Optimized Video Native Interface - The fastest video editing GPU-accelerated pipeline.

Connect to your VHDL simulation via JTAG! GDB <-TCP-> OpenOCD <-remote bitbang-> cosim_jtag <-VHPI or FLI-> VHDL simulator.

A home for all social change stories where NVC is a part of

An effort to collect all social change stories where NVC is a part of

A place to exchange NVC empathy.

🌈 Embark on a unique self-discovery journey, and gain greater awareness of your needs.

A website for Kenyan NVC retreat(s)

비폭력 대화에서의 자기 공감을 위한 느낌과 욕구를 찾는데 도움을 주는 사이트입니다

VHDL compiler and simulator

empathy.chat tests