Skip to content

Conversation

@li041
Copy link
Contributor

@li041 li041 commented Jan 28, 2026

Difference from percpu branch

  • Add percpu segment to dp1000 board
  • remove some unused imports

@dallasxy
Copy link
Contributor

please retest for all architecture

@dallasxy dallasxy requested review from enkerewpo and liulog January 28, 2026 05:54
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

UR-DP1000 is 8cores SoC

@dallasxy dallasxy merged commit d761504 into syswonder:dev Jan 28, 2026
24 checks passed
dallasxy added a commit that referenced this pull request Jan 28, 2026
new feature
1.PCIE Device Passthrough Refactoring #236
- Added support for PCIe systems on x86/arm64/riscv/loongarch64 platforms.
- Implemented three PCIe mechanisms: ECAM/DWC/loongarch64_pcie.
2.add support for ECX-2300F-PEG #254
3.add support for ur-dp-1000 #247
4.raise interrupt limit to 1024 for modern SoC support #220
5.add hv_end address output and clarify hvisor memory layout #224
6.improve per_cpu struct #255
7.support logical cpu id for riscv #243

bugfix
1.cpuid retrieved by `boot_cpuid_get` is corrupted in release mode #226
2.gits: add support for cmd MOVI #216
3.virtio:slove the race conditions caused by spinlock#241

CI / Code Quality
1.update GitHub workflows and labeler configuration #235
2.update ci for pcie #236
3.adapt log style from hvisor-tool #253

new board
riscv dp-1000
x86 ECX-2300F-PEG
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Projects

None yet

Development

Successfully merging this pull request may close these issues.

3 participants